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  • High Chip Utilization Ratio
    High Chip Utilization Ratio
  • High performance and Low Latency
    High performance and Low Latency
  • Highly Efficiency Software and Hardware Development Stack
    Highly Efficiency Software and Hardware Development Stack

Features

Chip Utilization Ratio: Up to 95.4%

Peak Performance: 10.9 TOPS

Work Temperature: -40℃ ~ 125℃

1

High Chip Utilization Ratio

Maximize Hardware Resources Utilization to Lower Total Cost

High Chip Utilization Ratio
High Performance and Low Latency
2

High Performance and Low Latency

High Throughput in Any Batch size

Low Latency for Realtime Applications

3

Highly Efficiency Software and Hardware Collaboration

Flexibility and Scalability in Deploying Complex Algorithms

Highly Efficiency Software and Hardware Collaboration

Acceleration Boards

Nebula Accelerator X3
Nebula Accelerator NA-100c
Rainman Accelerator